A reversible processor architecture and its reversible logic design

Publikation: Bidrag til bog/antologi/rapportKonferencebidrag i proceedingsForskningfagfællebedømt

We describe the design of a purely reversible computing architecture, Bob, and its instruction set, BobISA. The special features of the design include a simple, yet expressive, locally-invertible instruction set, and fully reversible control logic and address calculation. We have designed an architecture with an ISA that is expressive enough to serve as the target for a compiler from a high-level structured reversible programming language.

All-in-all, this paper demonstrates that the design of a complete reversible computing architecture is possible and can serve as the core of a programmable reversible computing system.
OriginalsprogEngelsk
TitelReversible Computation : Third International Workshop, RC 2011, Gent, Belgium, July 4-5, 2011. Revised Papers
RedaktørerAlexis De Vos, Robert Wille
Antal sider13
ForlagSpringer
Publikationsdato2012
Sider30-42
ISBN (Trykt)978-3-642-29516-4
ISBN (Elektronisk)978-3-642-29517-1
DOI
StatusUdgivet - 2012
Begivenhed3rd International Workshop on Reversible Computation - Gent, Belgien
Varighed: 4 jul. 20115 jul. 2011
Konferencens nummer: 3

Konference

Konference3rd International Workshop on Reversible Computation
Nummer3
LandBelgien
ByGent
Periode04/07/201105/07/2011
NavnLecture notes in computer science
Vol/bind7165
ISSN0302-9743

ID: 34263110